Fujitsu and SuVolta slash SRAM supply voltage Electronics News

FUJITSU Semiconductor and SuVolta have demonstrated ultra-low-voltage operation of static random access memory (SRAM) blocks down to 0.425V.

This was made possible by integrating SuVolta's PowerShrink low-power CMOS platform into Fujitsu Semiconductor's low-power process technology.

The results were presented at the 2011 International Electron Devices Meeting (IEDM) on 5 December.

Controlling power consumption is the primary limiter of adding features to product types ranging from mobile electronics to tethered servers and networking equipment. The biggest contributor to power consumption is supply voltage.

At the 130nm technology node, the power supply voltage of CMOS is at 1.0V. However, even as technology has scaled to 28nm, power supply voltage reduction has not kept up.

To reduce the power supply voltage, one of the biggest obstacles is the minimum operating voltage of embedded SRAM blocks.

By combining their technologies, the companies have verified that a 576Kb SRAM can work well at approximately 0.4V by reducing CMOS transistor threshold voltage (VT) variation to half.

This technology matches well with existing infrastructures including existing system-on-chip (SoC) design layouts, existing design schemes such as body bias control, and existing manufacturing tools.

Fujitsu and SuVolta slash SRAM supply voltage Electronics News